Product Summary

The K4S161622D-TC70 is a 512K×16Bit×2 Banks Synchronous DRAM. The K4S161622D-TC70 is organized as 2×524,288 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology. The K4S161622D-TC70 allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

K4S161622D-TC70 absolute maximum ratings: (1)Voltage on any pin relative to Vss VIN, VOUT: -1.0V to 4.6V; (2)Voltage on VDD supply relative to Vss VDD, VDDQ: -1.0V to 4.6V; (3)Storage temperature TSTG: -55℃ to +150℃; (4)Power dissipation PD: 1W; (5) Short circuit current IOS: 50mA.

Features

K4S161622D-TC70 features: (1)3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Dual banks operation; (4)MRS cycle with address key programs: CAS Latency (2&3), Burst Length (1, 2, 4, 8 & full page), Burst Type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst Read Single-bit Write operation; (7)DQM for masking; (8)Auto & self refresh; (9)15.6us refresh duty cycle (2K/32ms).

Diagrams

K4S161622D-TC70 block diagram

K4S160822D
K4S160822D

Other


Data Sheet

Negotiable 
K4S161622D
K4S161622D

Other


Data Sheet

Negotiable 
K4S161622D-TI/E
K4S161622D-TI/E

Other


Data Sheet

Negotiable 
K4S161622E
K4S161622E

Other


Data Sheet

Negotiable 
K4S161622H-TC55
K4S161622H-TC55

Other


Data Sheet

Negotiable 
K4S161622H-TC60
K4S161622H-TC60

Other


Data Sheet

Negotiable